Jitesh Sreedharan Nambiar is an accomplished PLM (Product Lifecycle Management) Architect with over 20 years of experience leading PLM strategy, implementation, and M&A initiatives across the hi‑tech, retail, and discrete manufacturing industries. He has extensive expertise in solution architecture, data migration, release management, and team leadership, with a proven record of delivering large-scale projects on time and within budget.
In his current role as Senior Business System Analyst – PLM at Google Inc., Jitesh drives key initiatives through requirements gathering, design documentation, and comprehensive testing. He has spearheaded the development of procurement and service Bills of Materials (BOMs) for datacenter equipment, enabling improved demand forecasting, supply planning, and accelerated spares planning. He also leads strategic initiatives to onboard design partners for co-design with Google and enables early NPI planning for data center deployments.
Previously, Jitesh held senior positions at Marvell Inc., where he implemented tools and processes for PLM systems (AgilePLM and Oracle Cloud) and managed critical integrations for M&A initiatives. During his long tenure at Infosys Ltd., he worked as a PLM Principal Consultant. He delivered high-impact projects for global leaders including Apple, Intel, Cavium, Nike, Alstom, Airbus, and JCI. His accomplishments include developing material compliance frameworks, PLM product development, driving system harmonization post-acquisitions, and leading automation and performance testing initiatives.
Throughout his career, Jitesh has been recognized for his ability to manage cross-functional teams, mentor staff across geographies ( India, US & E.U.), and build robust processes that improve efficiency and scalability. He is proficient in Agile PLM, Oracle PLM Cloud, Enovia 3DX, Windchill, Creo, Solidworks, CATIA V5, SQL, C++, and shell scripting, and communicates fluently in English, Hindi, Marathi, and Malayalam, with basic entry-level proficiency in French.
Jitesh holds a Bachelor of Engineering in Mechanical Engineering from Bombay University, Mumbai, India, and has authored several international papers on PLM best practices and semiconductor chip Bills of Materials.