Murali Krishna Reddy Mandalapu is a Senior Hardware Engineering Leader with over 25 years of experience in ASIC/SoC development. He specializes in high-performance computing (HPC), data centers, automotive ADAS, and enterprise storage solutions. With a deep understanding of HPC architectures, interconnect design, SoC verification, memory controllers, and high-speed interfaces (CXL, PCIe, DDR, HBM, NVMe, and AI acceleration), Murali has played a pivotal role in delivering first-pass silicon for demanding applications. His leadership in designing advanced memory subsystems, optimizing parallel workloads, and ensuring system-level performance has been crucial in the success of many cutting-edge semiconductor products. Murali is also adept at building and leading high-performing teams, defining product roadmaps, and executing risk mitigation strategies, all while aligning technology with business objectives to foster innovation and drive efficiency.
Murali's core competencies span a wide range of high-performance technologies, including HPC & fabric architectures, high-speed interconnects, and memory subsystem optimization. He has significant expertise in designing and optimizing large-scale parallel workloads using multi-core CPUs, GPUs, NPUs, and AI accelerators. His work with ultra-low-latency, high-bandwidth interconnects (such as CXL 3.0, PCIe Gen6, and Xe Link) has been essential in ensuring the efficient movement of data across HPC clusters. Furthermore, Murali has advanced skills in SoC architecture and front-end design, with a proven ability to manage the full lifecycle of SoC design, from microarchitecture definition to interface design. His proficiency in SoC verification, using methodologies like UVM/SystemVerilog, and post-silicon validation has helped ensure first-pass silicon success in various applications, including AI/ML and data-intensive workloads. Additionally, Murali is experienced in emulation and prototyping, with a strong background in FPGA-based emulation and pre-silicon validation techniques to identify system-level bugs early.
Throughout his career, Murali has been instrumental in power and performance optimization, particularly in the context of low-power verification, AI workload tuning, and thermal efficiency. His expertise also extends to post-silicon debug and validation, where he applies DFx methodologies and functional validation techniques to optimize product performance and accelerate time-to-market. As a strategic leader, Murali has successfully managed multi-million-dollar R&D budgets and has built high-performing engineering teams, enabling seamless product development from concept to market. His ability to anticipate industry trends and drive technological advancements has helped maintain a competitive edge in the semiconductor market. Additionally, Murali is known for his mentorship and commitment to nurturing the next generation of engineers, fostering collaboration across diverse teams, and promoting continuous learning within the organization.
In his recent roles, Murali has served as the Senior Director of Hardware Engineering at Renesas Electronics America, where he has worked on the R-Car X5H SoC, targeting ADAS applications, and managed product architecture, verification, and validation for CXL 3.0 memory controllers. Before joining Renesas, Murali held leadership positions at Intel Corporation, where he architected edge HPC SoCs and developed innovative methods to speed up simulations, leading successful design-in efforts and building design and validation teams from the ground up. At HGST Inc (Western Digital), he led the verification of eSSD controllers and developed new methods for simulation and verification. Murali also contributed significantly to the development of verification methodologies for SoCs at Ineda Systems, NXP Semiconductors, Intel Technology India Pvt Ltd, and Texas Instruments India, demonstrating his ability to optimize and streamline verification processes, reduce test run times, and enhance overall efficiency.
Murali holds a Bachelor of Technology in Electronics and Communication Engineering from Nagarjuna University, India, and an MBA from Sikkim Manipal University. His extensive career and leadership in semiconductor product development have made him a respected figure in the industry, known for his ability to deliver cutting-edge solutions while mentoring the next generation of engineers.