Nearly every embedded AI processor is marketed with a TOPS number that predicts almost nothing about whether a Physical AI system meets its control deadline. The model may be fast, but the loop also runs stages no framework operator matches: turning depth into a grasp candidate, locating an object under uncooperative lighting, maintaining an occupancy grid, deciding from tactile signal whether the gripper has closed. We follow one such loop on a processor where CPU, integrated GPU and NPU share one memory pool. We show where each stage should run, what handoffs cost, how access patterns, occupancy and local memory decide whether a stage fits its budget, and how to benchmark the deployed loop instead of flattering the silicon. A fast wrong stage is worse than a slow right one, so we cover verification and our own measurement mistakes. The one-page checklist is worth taking home.