I am an experienced engineer with 7 years in SoC design and verification, currently focused on full-chip coherency verification of advanced, high-performance computing systems. At NVIDIA, I actively contribute to the validation of flagship architectures such as Grace Hopper and Blackwell GPUs, which power DGX-class platforms used across AI, data center, automotive, and HPC applications. I have a strong track record of verifying silicon tailored for AI acceleration, working closely with industry-leading designs that push the boundaries of compute, memory, and interconnect complexity.

I hold a Master’s degree in Computer Engineering from the University of Southern California. Prior to NVIDIA, I developed firmware with a focus on security for Robert Bosch, gaining hands-on experience bridging low-level software and hardware security.

Well-versed in modern computer architecture, I possess deep expertise in cache coherence protocols, multi-agent interconnect systems, and memory consistency models. My work centers on verifying complex heterogeneous SoC architectures, including CPU-GPU interactions under parallel, high-throughput workloads. I am passionate about enabling robust, scalable, and high-efficiency hardware that powers next-generation AI training and inference systems, continuously driven by the challenge of verifying correctness and security in large, tightly integrated computing platforms.